Change comment style in .S files
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parent
83652d0787
commit
132863599c
4 changed files with 27 additions and 27 deletions
44
scrypt-x64.S
44
scrypt-x64.S
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@ -221,14 +221,14 @@ scrypt_best_throughput_exit:
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.text
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.text
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.p2align 6
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.p2align 6
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salsa8_core_gen:
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salsa8_core_gen:
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# 0: %rdx, %rdi, %rcx, %rsi
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/* 0: %rdx, %rdi, %rcx, %rsi */
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movq 8(%rsp), %rdi
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movq 8(%rsp), %rdi
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movq %rdi, %rdx
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movq %rdi, %rdx
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shrq $32, %rdi
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shrq $32, %rdi
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movq 16(%rsp), %rsi
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movq 16(%rsp), %rsi
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movq %rsi, %rcx
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movq %rsi, %rcx
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shrq $32, %rsi
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shrq $32, %rsi
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# 1: %r9, 72(%rsp), %rax, %r8
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/* 1: %r9, 72(%rsp), %rax, %r8 */
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movq 24(%rsp), %r8
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movq 24(%rsp), %r8
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movq %r8, %r9
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movq %r8, %r9
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shrq $32, %r8
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shrq $32, %r8
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@ -236,15 +236,15 @@ salsa8_core_gen:
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movq 32(%rsp), %r8
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movq 32(%rsp), %r8
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movq %r8, %rax
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movq %r8, %rax
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shrq $32, %r8
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shrq $32, %r8
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# 2: %r11, %r10, 48(%rsp), %r12
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/* 2: %r11, %r10, 48(%rsp), %r12 */
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movq 40(%rsp), %r10
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movq 40(%rsp), %r10
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movq %r10, %r11
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movq %r10, %r11
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shrq $32, %r10
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shrq $32, %r10
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movq 48(%rsp), %r12
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movq 48(%rsp), %r12
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#movq %r12, %r13
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/* movq %r12, %r13 */
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#movq %r13, 48(%rsp)
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/* movq %r13, 48(%rsp) */
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shrq $32, %r12
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shrq $32, %r12
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# 3: %r14, %r13, %rbx, 88(%rsp)
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/* 3: %r14, %r13, %rbx, 88(%rsp) */
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movq 56(%rsp), %r13
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movq 56(%rsp), %r13
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movq %r13, %r14
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movq %r13, %r14
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shrq $32, %r13
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shrq $32, %r13
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@ -305,14 +305,14 @@ salsa8_core_gen:
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punpcklqdq %xmm6, %xmm2
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punpcklqdq %xmm6, %xmm2
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punpcklqdq %xmm7, %xmm3
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punpcklqdq %xmm7, %xmm3
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#movq %rdx, 8(%rsp)
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/* movq %rdx, 8(%rsp) */
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#movq %rcx, 16(%rsp)
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/* movq %rcx, 16(%rsp) */
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#movq %r9, 24(%rsp)
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/* movq %r9, 24(%rsp) */
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#movq %rax, 32(%rsp)
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/* movq %rax, 32(%rsp) */
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#movq %r11, 40(%rsp)
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/* movq %r11, 40(%rsp) */
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#movq %r8, 48(%rsp)
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/* movq %r8, 48(%rsp) */
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#movq %r14, 56(%rsp)
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/* movq %r14, 56(%rsp) */
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#movq %rbx, 64(%rsp)
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/* movq %rbx, 64(%rsp) */
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ret
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ret
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@ -371,7 +371,7 @@ _scrypt_core:
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popq %rbx
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popq %rbx
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.endm
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.endm
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# GenuineIntel processors have fast SIMD
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/* GenuineIntel processors have fast SIMD */
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xorl %eax, %eax
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xorl %eax, %eax
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cpuid
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cpuid
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cmpl $0x6c65746e, %ecx
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cmpl $0x6c65746e, %ecx
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@ -594,7 +594,7 @@ scrypt_core_gen_loop2:
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.p2align 6
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.p2align 6
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scrypt_core_xmm:
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scrypt_core_xmm:
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# shuffle 1st block into %xmm8-%xmm11
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/* shuffle 1st block into %xmm8-%xmm11 */
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movl 60(%rdi), %edx
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movl 60(%rdi), %edx
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movl 44(%rdi), %ecx
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movl 44(%rdi), %ecx
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movl 28(%rdi), %ebx
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movl 28(%rdi), %ebx
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@ -652,7 +652,7 @@ scrypt_core_xmm:
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paddd %xmm2, %xmm10
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paddd %xmm2, %xmm10
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paddd %xmm3, %xmm11
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paddd %xmm3, %xmm11
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# shuffle 2nd block into %xmm12-%xmm15
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/* shuffle 2nd block into %xmm12-%xmm15 */
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movl 124(%rdi), %edx
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movl 124(%rdi), %edx
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movl 108(%rdi), %ecx
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movl 108(%rdi), %ecx
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movl 92(%rdi), %ebx
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movl 92(%rdi), %ebx
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@ -807,7 +807,7 @@ scrypt_core_xmm_loop2:
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subq $1, %rcx
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subq $1, %rcx
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ja scrypt_core_xmm_loop2
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ja scrypt_core_xmm_loop2
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# re-shuffle 1st block back
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/* re-shuffle 1st block back */
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movd %xmm8, %eax
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movd %xmm8, %eax
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movd %xmm9, %edx
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movd %xmm9, %edx
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movd %xmm10, %ecx
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movd %xmm10, %ecx
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@ -853,7 +853,7 @@ scrypt_core_xmm_loop2:
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movl %ebx, 28(%rdi)
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movl %ebx, 28(%rdi)
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movl %eax, 12(%rdi)
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movl %eax, 12(%rdi)
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# re-shuffle 2nd block back
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/* re-shuffle 2nd block back */
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movd %xmm12, %eax
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movd %xmm12, %eax
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movd %xmm13, %edx
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movd %xmm13, %edx
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movd %xmm14, %ecx
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movd %xmm14, %ecx
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@ -1111,20 +1111,20 @@ _scrypt_core_3way:
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#if !defined(USE_AVX)
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#if !defined(USE_AVX)
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jmp scrypt_core_3way_xmm
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jmp scrypt_core_3way_xmm
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#else
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#else
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# Check for AVX and OSXSAVE support
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/* Check for AVX and OSXSAVE support */
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movl $1, %eax
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movl $1, %eax
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cpuid
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cpuid
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andl $0x18000000, %ecx
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andl $0x18000000, %ecx
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cmpl $0x18000000, %ecx
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cmpl $0x18000000, %ecx
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jne scrypt_core_3way_xmm
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jne scrypt_core_3way_xmm
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# Check for XMM and YMM state support
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/* Check for XMM and YMM state support */
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xorl %ecx, %ecx
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xorl %ecx, %ecx
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xgetbv
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xgetbv
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andl $0x00000006, %eax
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andl $0x00000006, %eax
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cmpl $0x00000006, %eax
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cmpl $0x00000006, %eax
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jne scrypt_core_3way_xmm
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jne scrypt_core_3way_xmm
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#if defined(USE_XOP)
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#if defined(USE_XOP)
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# Check for XOP support
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/* Check for XOP support */
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movl $0x80000001, %eax
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movl $0x80000001, %eax
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cpuid
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cpuid
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andl $0x00000800, %ecx
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andl $0x00000800, %ecx
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@ -406,7 +406,7 @@ _scrypt_core:
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pushl %edi
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pushl %edi
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pushl %esi
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pushl %esi
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# Check for SSE2 availability
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/* Check for SSE2 availability */
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movl $1, %eax
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movl $1, %eax
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cpuid
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cpuid
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andl $0x04000000, %edx
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andl $0x04000000, %edx
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@ -2561,20 +2561,20 @@ _sha256_use_4way:
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pushq %rdx
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pushq %rdx
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#if defined(USE_AVX)
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#if defined(USE_AVX)
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# Check for AVX and OSXSAVE support
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/* Check for AVX and OSXSAVE support */
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movl $1, %eax
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movl $1, %eax
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cpuid
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cpuid
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andl $0x18000000, %ecx
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andl $0x18000000, %ecx
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cmpl $0x18000000, %ecx
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cmpl $0x18000000, %ecx
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jne sha256_use_4way_base
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jne sha256_use_4way_base
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# Check for XMM and YMM state support
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/* Check for XMM and YMM state support */
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xorl %ecx, %ecx
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xorl %ecx, %ecx
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xgetbv
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xgetbv
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andl $0x00000006, %eax
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andl $0x00000006, %eax
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cmpl $0x00000006, %eax
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cmpl $0x00000006, %eax
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jne sha256_use_4way_base
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jne sha256_use_4way_base
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#if defined(USE_XOP)
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#if defined(USE_XOP)
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# Check for XOP support
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/* Check for XOP support */
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movl $0x80000001, %eax
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movl $0x80000001, %eax
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cpuid
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cpuid
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andl $0x00000800, %ecx
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andl $0x00000800, %ecx
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@ -1177,7 +1177,7 @@ sha256_use_4way:
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_sha256_use_4way:
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_sha256_use_4way:
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pushl %ebx
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pushl %ebx
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# Check for SSE2 availability
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/* Check for SSE2 availability */
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movl $1, %eax
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movl $1, %eax
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cpuid
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cpuid
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andl $0x04000000, %edx
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andl $0x04000000, %edx
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