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More optimization for x86 and x86-64, including AMD K10

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pooler 2012-01-03 13:11:43 +01:00
parent 31c3074537
commit 476e2325ee
3 changed files with 147 additions and 164 deletions
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223
scrypt-x64.S
View file

@ -1,4 +1,4 @@
# Copyright 2011 pooler@litecoinpool.org # Copyright 2011-2012 pooler@litecoinpool.org
# All rights reserved. # All rights reserved.
# #
# Redistribution and use in source and binary forms, with or without # Redistribution and use in source and binary forms, with or without
@ -30,6 +30,7 @@
.macro gen_salsa8_core_doubleround .macro gen_salsa8_core_doubleround
movq 72(%rsp), %r15 movq 72(%rsp), %r15
leaq (%r14, %rdx), %rbp leaq (%r14, %rdx), %rbp
roll $7, %ebp roll $7, %ebp
xorq %rbp, %r9 xorq %rbp, %r9
@ -54,8 +55,10 @@
leaq (%r13, %rdi), %rbp leaq (%r13, %rdi), %rbp
roll $18, %ebp roll $18, %ebp
xorq %rbp, %r15 xorq %rbp, %r15
movq 48(%rsp), %rbp movq 48(%rsp), %rbp
movq %r15, 72(%rsp) movq %r15, 72(%rsp)
leaq (%rax, %rbp), %r15 leaq (%rax, %rbp), %r15
roll $7, %r15d roll $7, %r15d
xorq %r15, %rbx xorq %r15, %rbx
@ -68,8 +71,10 @@
leaq (%rcx, %rax), %r15 leaq (%rcx, %rax), %r15
roll $18, %r15d roll $18, %r15d
xorq %r15, %rbp xorq %r15, %rbp
movq 88(%rsp), %r15 movq 88(%rsp), %r15
movq %rbp, 48(%rsp) movq %rbp, 48(%rsp)
leaq (%r12, %r15), %rbp leaq (%r12, %r15), %rbp
roll $7, %ebp roll $7, %ebp
xorq %rbp, %rsi xorq %rbp, %rsi
@ -82,8 +87,10 @@
leaq (%r8, %r12), %rbp leaq (%r8, %r12), %rbp
roll $18, %ebp roll $18, %ebp
xorq %rbp, %r15 xorq %rbp, %r15
movq %r15, 88(%rsp) movq %r15, 88(%rsp)
movq 72(%rsp), %r15 movq 72(%rsp), %r15
leaq (%rsi, %rdx), %rbp leaq (%rsi, %rdx), %rbp
roll $7, %ebp roll $7, %ebp
xorq %rbp, %rdi xorq %rbp, %rdi
@ -108,8 +115,10 @@
leaq (%r8, %r9), %rbp leaq (%r8, %r9), %rbp
roll $18, %ebp roll $18, %ebp
xorq %rbp, %r15 xorq %rbp, %r15
movq 48(%rsp), %rbp movq 48(%rsp), %rbp
movq %r15, 72(%rsp) movq %r15, 72(%rsp)
leaq (%r10, %rbp), %r15 leaq (%r10, %rbp), %r15
roll $7, %r15d roll $7, %r15d
xorq %r15, %r12 xorq %r15, %r12
@ -122,8 +131,10 @@
leaq (%r11, %r10), %r15 leaq (%r11, %r10), %r15
roll $18, %r15d roll $18, %r15d
xorq %r15, %rbp xorq %r15, %rbp
movq 88(%rsp), %r15 movq 88(%rsp), %r15
movq %rbp, 48(%rsp) movq %rbp, 48(%rsp)
leaq (%rbx, %r15), %rbp leaq (%rbx, %r15), %rbp
roll $7, %ebp roll $7, %ebp
xorq %rbp, %r14 xorq %rbp, %r14
@ -136,6 +147,7 @@
leaq (%r13, %rbx), %rbp leaq (%r13, %rbx), %rbp
roll $18, %ebp roll $18, %ebp
xorq %rbp, %r15 xorq %rbp, %r15
movq %r15, 88(%rsp) movq %r15, 88(%rsp)
.endm .endm
@ -832,15 +844,16 @@ _prefer_dual_scrypt:
pushq %rbx pushq %rbx
xorq %rax, %rax xorq %rax, %rax
cpuid cpuid
xorq %rax, %rax movq $1, %rax
cmpl $0x6c65746e, %ecx cmpl $0x444d4163, %ecx
jne prefer_dual_scrypt_false jne prefer_dual_scrypt_exit
cmpl $0x49656e69, %edx cmpl $0x69746e65, %edx
jne prefer_dual_scrypt_false jne prefer_dual_scrypt_exit
cmpl $0x756e6547, %ebx cmpl $0x68747541, %ebx
jne prefer_dual_scrypt_false jne prefer_dual_scrypt_exit
incl %eax cpuid
prefer_dual_scrypt_false: andl $0x0ff00000, %eax
prefer_dual_scrypt_exit:
popq %rbx popq %rbx
ret ret
@ -1118,9 +1131,13 @@ _dual_scrypt_core:
movl %ebp, 100(%rsi) movl %ebp, 100(%rsi)
movl %ecx, 116(%rsi) movl %ecx, 116(%rsi)
movdqa 64(%rsi), %xmm12
movdqa 80(%rsi), %xmm13
movdqa 96(%rsi), %xmm14
movdqa 112(%rsi), %xmm15
movq %rdx, %rbp movq %rdx, %rbp
leaq 262144(%rdx), %rcx leaq 262144(%rdx), %rcx
.align 8
dual_scrypt_core_loop1: dual_scrypt_core_loop1:
movdqa 0(%rdi), %xmm0 movdqa 0(%rdi), %xmm0
movdqa 16(%rdi), %xmm1 movdqa 16(%rdi), %xmm1
@ -1134,10 +1151,10 @@ dual_scrypt_core_loop1:
movdqa 16(%rsi), %xmm9 movdqa 16(%rsi), %xmm9
movdqa 32(%rsi), %xmm10 movdqa 32(%rsi), %xmm10
movdqa 48(%rsi), %xmm11 movdqa 48(%rsi), %xmm11
movdqa 64(%rsi), %xmm12 pxor %xmm4, %xmm0
movdqa 80(%rsi), %xmm13 pxor %xmm5, %xmm1
movdqa 96(%rsi), %xmm14 pxor %xmm6, %xmm2
movdqa 112(%rsi), %xmm15 pxor %xmm7, %xmm3
movdqa %xmm0, 0(%rbp) movdqa %xmm0, 0(%rbp)
movdqa %xmm1, 16(%rbp) movdqa %xmm1, 16(%rbp)
movdqa %xmm2, 32(%rbp) movdqa %xmm2, 32(%rbp)
@ -1146,6 +1163,10 @@ dual_scrypt_core_loop1:
movdqa %xmm5, 80(%rbp) movdqa %xmm5, 80(%rbp)
movdqa %xmm6, 96(%rbp) movdqa %xmm6, 96(%rbp)
movdqa %xmm7, 112(%rbp) movdqa %xmm7, 112(%rbp)
pxor %xmm12, %xmm8
pxor %xmm13, %xmm9
pxor %xmm14, %xmm10
pxor %xmm15, %xmm11
movdqa %xmm8, 128(%rbp) movdqa %xmm8, 128(%rbp)
movdqa %xmm9, 144(%rbp) movdqa %xmm9, 144(%rbp)
movdqa %xmm10, 160(%rbp) movdqa %xmm10, 160(%rbp)
@ -1155,31 +1176,15 @@ dual_scrypt_core_loop1:
movdqa %xmm14, 224(%rbp) movdqa %xmm14, 224(%rbp)
movdqa %xmm15, 240(%rbp) movdqa %xmm15, 240(%rbp)
pxor %xmm4, %xmm0
pxor %xmm5, %xmm1
pxor %xmm6, %xmm2
pxor %xmm7, %xmm3
pxor %xmm12, %xmm8
pxor %xmm13, %xmm9
pxor %xmm14, %xmm10
pxor %xmm15, %xmm11
movdqa %xmm0, 0(%rdi)
movdqa %xmm1, 16(%rdi)
movdqa %xmm2, 32(%rdi)
movdqa %xmm3, 48(%rdi)
movdqa %xmm8, 0(%rsi)
movdqa %xmm9, 16(%rsi)
movdqa %xmm10, 32(%rsi)
movdqa %xmm11, 48(%rsi)
xmm_dual_salsa8_core xmm_dual_salsa8_core
paddd 0(%rdi), %xmm0 paddd 0(%rbp), %xmm0
paddd 16(%rdi), %xmm1 paddd 16(%rbp), %xmm1
paddd 32(%rdi), %xmm2 paddd 32(%rbp), %xmm2
paddd 48(%rdi), %xmm3 paddd 48(%rbp), %xmm3
paddd 0(%rsi), %xmm8 paddd 128(%rbp), %xmm8
paddd 16(%rsi), %xmm9 paddd 144(%rbp), %xmm9
paddd 32(%rsi), %xmm10 paddd 160(%rbp), %xmm10
paddd 48(%rsi), %xmm11 paddd 176(%rbp), %xmm11
movdqa %xmm0, 0(%rdi) movdqa %xmm0, 0(%rdi)
movdqa %xmm1, 16(%rdi) movdqa %xmm1, 16(%rdi)
movdqa %xmm2, 32(%rdi) movdqa %xmm2, 32(%rdi)
@ -1193,82 +1198,65 @@ dual_scrypt_core_loop1:
pxor 80(%rdi), %xmm1 pxor 80(%rdi), %xmm1
pxor 96(%rdi), %xmm2 pxor 96(%rdi), %xmm2
pxor 112(%rdi), %xmm3 pxor 112(%rdi), %xmm3
pxor 64(%rsi), %xmm8 pxor %xmm12, %xmm8
pxor 80(%rsi), %xmm9 pxor %xmm13, %xmm9
pxor 96(%rsi), %xmm10 pxor %xmm14, %xmm10
pxor 112(%rsi), %xmm11 pxor %xmm15, %xmm11
movdqa %xmm0, 64(%rdi) movdqa %xmm0, 64(%rdi)
movdqa %xmm1, 80(%rdi) movdqa %xmm1, 80(%rdi)
movdqa %xmm2, 96(%rdi) movdqa %xmm2, 96(%rdi)
movdqa %xmm3, 112(%rdi) movdqa %xmm3, 112(%rdi)
movdqa %xmm8, 64(%rsi) movdqa %xmm8, %xmm12
movdqa %xmm9, 80(%rsi) movdqa %xmm9, %xmm13
movdqa %xmm10, 96(%rsi) movdqa %xmm10, %xmm14
movdqa %xmm11, 112(%rsi) movdqa %xmm11, %xmm15
xmm_dual_salsa8_core xmm_dual_salsa8_core
paddd 64(%rdi), %xmm0 paddd 64(%rdi), %xmm0
paddd 80(%rdi), %xmm1 paddd 80(%rdi), %xmm1
paddd 96(%rdi), %xmm2 paddd 96(%rdi), %xmm2
paddd 112(%rdi), %xmm3 paddd 112(%rdi), %xmm3
paddd 64(%rsi), %xmm8 paddd %xmm8, %xmm12
paddd 80(%rsi), %xmm9 paddd %xmm9, %xmm13
paddd 96(%rsi), %xmm10 paddd %xmm10, %xmm14
paddd 112(%rsi), %xmm11 paddd %xmm11, %xmm15
movdqa %xmm0, 64(%rdi) movdqa %xmm0, 64(%rdi)
movdqa %xmm1, 80(%rdi) movdqa %xmm1, 80(%rdi)
movdqa %xmm2, 96(%rdi) movdqa %xmm2, 96(%rdi)
movdqa %xmm3, 112(%rdi) movdqa %xmm3, 112(%rdi)
movdqa %xmm8, 64(%rsi)
movdqa %xmm9, 80(%rsi)
movdqa %xmm10, 96(%rsi)
movdqa %xmm11, 112(%rsi)
addq $256, %rbp addq $256, %rbp
cmpq %rcx, %rbp cmpq %rcx, %rbp
jne dual_scrypt_core_loop1 jne dual_scrypt_core_loop1
movq $1024, %rcx movq $1024, %rcx
.align 8
dual_scrypt_core_loop2: dual_scrypt_core_loop2:
movl 64(%rdi), %ebp movdqa 0(%rdi), %xmm0
movdqa 16(%rdi), %xmm1
movdqa 32(%rdi), %xmm2
movdqa 48(%rdi), %xmm3
movdqa 64(%rdi), %xmm4
movdqa 80(%rdi), %xmm5
movdqa 96(%rdi), %xmm6
movdqa 112(%rdi), %xmm7
movdqa 0(%rsi), %xmm8
movdqa 16(%rsi), %xmm9
movdqa 32(%rsi), %xmm10
movdqa 48(%rsi), %xmm11
movd %xmm4, %ebp
andl $1023, %ebp andl $1023, %ebp
shll $8, %ebp shll $8, %ebp
movdqa 0(%rdx, %rbp), %xmm0 pxor 0(%rdx, %rbp), %xmm0
movdqa 16(%rdx, %rbp), %xmm1 pxor 16(%rdx, %rbp), %xmm1
movdqa 32(%rdx, %rbp), %xmm2 pxor 32(%rdx, %rbp), %xmm2
movdqa 48(%rdx, %rbp), %xmm3 pxor 48(%rdx, %rbp), %xmm3
movdqa 64(%rdx, %rbp), %xmm4 movd %xmm12, %ebx
movdqa 80(%rdx, %rbp), %xmm5 andl $1023, %ebx
movdqa 96(%rdx, %rbp), %xmm6 shll $8, %ebx
movdqa 112(%rdx, %rbp), %xmm7 addl $128, %ebx
movl 64(%rsi), %ebp pxor 0(%rdx, %rbx), %xmm8
andl $1023, %ebp pxor 16(%rdx, %rbx), %xmm9
shll $8, %ebp pxor 32(%rdx, %rbx), %xmm10
addl $128, %ebp pxor 48(%rdx, %rbx), %xmm11
movdqa 0(%rdx, %rbp), %xmm8
movdqa 16(%rdx, %rbp), %xmm9
movdqa 32(%rdx, %rbp), %xmm10
movdqa 48(%rdx, %rbp), %xmm11
movdqa 64(%rdx, %rbp), %xmm12
movdqa 80(%rdx, %rbp), %xmm13
movdqa 96(%rdx, %rbp), %xmm14
movdqa 112(%rdx, %rbp), %xmm15
pxor 0(%rdi), %xmm0
pxor 16(%rdi), %xmm1
pxor 32(%rdi), %xmm2
pxor 48(%rdi), %xmm3
pxor 64(%rdi), %xmm4
pxor 80(%rdi), %xmm5
pxor 96(%rdi), %xmm6
pxor 112(%rdi), %xmm7
pxor 0(%rsi), %xmm8
pxor 16(%rsi), %xmm9
pxor 32(%rsi), %xmm10
pxor 48(%rsi), %xmm11
pxor 64(%rsi), %xmm12
pxor 80(%rsi), %xmm13
pxor 96(%rsi), %xmm14
pxor 112(%rsi), %xmm15
pxor %xmm4, %xmm0 pxor %xmm4, %xmm0
pxor %xmm5, %xmm1 pxor %xmm5, %xmm1
@ -1282,18 +1270,10 @@ dual_scrypt_core_loop2:
movdqa %xmm1, 16(%rdi) movdqa %xmm1, 16(%rdi)
movdqa %xmm2, 32(%rdi) movdqa %xmm2, 32(%rdi)
movdqa %xmm3, 48(%rdi) movdqa %xmm3, 48(%rdi)
movdqa %xmm4, 64(%rdi)
movdqa %xmm5, 80(%rdi)
movdqa %xmm6, 96(%rdi)
movdqa %xmm7, 112(%rdi)
movdqa %xmm8, 0(%rsi) movdqa %xmm8, 0(%rsi)
movdqa %xmm9, 16(%rsi) movdqa %xmm9, 16(%rsi)
movdqa %xmm10, 32(%rsi) movdqa %xmm10, 32(%rsi)
movdqa %xmm11, 48(%rsi) movdqa %xmm11, 48(%rsi)
movdqa %xmm12, 64(%rsi)
movdqa %xmm13, 80(%rsi)
movdqa %xmm14, 96(%rsi)
movdqa %xmm15, 112(%rsi)
xmm_dual_salsa8_core xmm_dual_salsa8_core
paddd 0(%rdi), %xmm0 paddd 0(%rdi), %xmm0
paddd 16(%rdi), %xmm1 paddd 16(%rdi), %xmm1
@ -1312,43 +1292,52 @@ dual_scrypt_core_loop2:
movdqa %xmm10, 32(%rsi) movdqa %xmm10, 32(%rsi)
movdqa %xmm11, 48(%rsi) movdqa %xmm11, 48(%rsi)
pxor 64(%rdx, %rbp), %xmm0
pxor 80(%rdx, %rbp), %xmm1
pxor 96(%rdx, %rbp), %xmm2
pxor 112(%rdx, %rbp), %xmm3
pxor 64(%rdx, %rbx), %xmm8
pxor 80(%rdx, %rbx), %xmm9
pxor 96(%rdx, %rbx), %xmm10
pxor 112(%rdx, %rbx), %xmm11
pxor 64(%rdi), %xmm0 pxor 64(%rdi), %xmm0
pxor 80(%rdi), %xmm1 pxor 80(%rdi), %xmm1
pxor 96(%rdi), %xmm2 pxor 96(%rdi), %xmm2
pxor 112(%rdi), %xmm3 pxor 112(%rdi), %xmm3
pxor 64(%rsi), %xmm8 pxor %xmm12, %xmm8
pxor 80(%rsi), %xmm9 pxor %xmm13, %xmm9
pxor 96(%rsi), %xmm10 pxor %xmm14, %xmm10
pxor 112(%rsi), %xmm11 pxor %xmm15, %xmm11
movdqa %xmm0, 64(%rdi) movdqa %xmm0, 64(%rdi)
movdqa %xmm1, 80(%rdi) movdqa %xmm1, 80(%rdi)
movdqa %xmm2, 96(%rdi) movdqa %xmm2, 96(%rdi)
movdqa %xmm3, 112(%rdi) movdqa %xmm3, 112(%rdi)
movdqa %xmm8, 64(%rsi) movdqa %xmm8, %xmm12
movdqa %xmm9, 80(%rsi) movdqa %xmm9, %xmm13
movdqa %xmm10, 96(%rsi) movdqa %xmm10, %xmm14
movdqa %xmm11, 112(%rsi) movdqa %xmm11, %xmm15
xmm_dual_salsa8_core xmm_dual_salsa8_core
paddd 64(%rdi), %xmm0 paddd 64(%rdi), %xmm0
paddd 80(%rdi), %xmm1 paddd 80(%rdi), %xmm1
paddd 96(%rdi), %xmm2 paddd 96(%rdi), %xmm2
paddd 112(%rdi), %xmm3 paddd 112(%rdi), %xmm3
paddd 64(%rsi), %xmm8 paddd %xmm8, %xmm12
paddd 80(%rsi), %xmm9 paddd %xmm9, %xmm13
paddd 96(%rsi), %xmm10 paddd %xmm10, %xmm14
paddd 112(%rsi), %xmm11 paddd %xmm11, %xmm15
movdqa %xmm0, 64(%rdi) movdqa %xmm0, 64(%rdi)
movdqa %xmm1, 80(%rdi) movdqa %xmm1, 80(%rdi)
movdqa %xmm2, 96(%rdi) movdqa %xmm2, 96(%rdi)
movdqa %xmm3, 112(%rdi) movdqa %xmm3, 112(%rdi)
movdqa %xmm8, 64(%rsi)
movdqa %xmm9, 80(%rsi)
movdqa %xmm10, 96(%rsi)
movdqa %xmm11, 112(%rsi)
subq $1, %rcx subq $1, %rcx
ja dual_scrypt_core_loop2 ja dual_scrypt_core_loop2
movdqa %xmm12, 64(%rsi)
movdqa %xmm13, 80(%rsi)
movdqa %xmm14, 96(%rsi)
movdqa %xmm15, 112(%rsi)
# shuffle 1st block # shuffle 1st block
movl 60(%rdi), %ebp movl 60(%rdi), %ebp
movl 44(%rdi), %ecx movl 44(%rdi), %ecx

83
scrypt-x86.S
View file

@ -1,4 +1,4 @@
# Copyright 2011 pooler@litecoinpool.org # Copyright 2011-2012 pooler@litecoinpool.org
# All rights reserved. # All rights reserved.
# #
# Redistribution and use in source and binary forms, with or without # Redistribution and use in source and binary forms, with or without
@ -22,6 +22,10 @@
# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF # OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
# SUCH DAMAGE. # SUCH DAMAGE.
#if defined(__linux__) && defined(__ELF__)
.section .note.GNU-stack,"",%progbits
#endif
#if defined(__i386__) #if defined(__i386__)
.macro gen_salsa8_core_quadround .macro gen_salsa8_core_quadround
@ -712,6 +716,9 @@ xmm_scrypt_core:
movl %ecx, 96(%esp) movl %ecx, 96(%esp)
movl %ebx, 112(%esp) movl %ebx, 112(%esp)
movdqa 96(%esp), %xmm6
movdqa 112(%esp), %xmm7
movl %esi, %edx movl %esi, %edx
leal 131072(%esi), %ecx leal 131072(%esi), %ecx
xmm_scrypt_core_loop1: xmm_scrypt_core_loop1:
@ -721,8 +728,10 @@ xmm_scrypt_core_loop1:
movdqa 48(%esp), %xmm3 movdqa 48(%esp), %xmm3
movdqa 64(%esp), %xmm4 movdqa 64(%esp), %xmm4
movdqa 80(%esp), %xmm5 movdqa 80(%esp), %xmm5
movdqa 96(%esp), %xmm6 pxor %xmm4, %xmm0
movdqa 112(%esp), %xmm7 pxor %xmm5, %xmm1
pxor %xmm6, %xmm2
pxor %xmm7, %xmm3
movdqa %xmm0, 0(%edx) movdqa %xmm0, 0(%edx)
movdqa %xmm1, 16(%edx) movdqa %xmm1, 16(%edx)
movdqa %xmm2, 32(%edx) movdqa %xmm2, 32(%edx)
@ -732,19 +741,11 @@ xmm_scrypt_core_loop1:
movdqa %xmm6, 96(%edx) movdqa %xmm6, 96(%edx)
movdqa %xmm7, 112(%edx) movdqa %xmm7, 112(%edx)
pxor %xmm4, %xmm0
pxor %xmm5, %xmm1
pxor %xmm6, %xmm2
pxor %xmm7, %xmm3
movdqa %xmm0, 0(%esp)
movdqa %xmm1, 16(%esp)
movdqa %xmm2, 32(%esp)
movdqa %xmm3, 48(%esp)
xmm_salsa8_core xmm_salsa8_core
paddd 0(%esp), %xmm0 paddd 0(%edx), %xmm0
paddd 16(%esp), %xmm1 paddd 16(%edx), %xmm1
paddd 32(%esp), %xmm2 paddd 32(%edx), %xmm2
paddd 48(%esp), %xmm3 paddd 48(%edx), %xmm3
movdqa %xmm0, 0(%esp) movdqa %xmm0, 0(%esp)
movdqa %xmm1, 16(%esp) movdqa %xmm1, 16(%esp)
movdqa %xmm2, 32(%esp) movdqa %xmm2, 32(%esp)
@ -752,36 +753,33 @@ xmm_scrypt_core_loop1:
pxor 64(%esp), %xmm0 pxor 64(%esp), %xmm0
pxor 80(%esp), %xmm1 pxor 80(%esp), %xmm1
pxor 96(%esp), %xmm2 pxor %xmm6, %xmm2
pxor 112(%esp), %xmm3 pxor %xmm7, %xmm3
movdqa %xmm0, 64(%esp) movdqa %xmm0, 64(%esp)
movdqa %xmm1, 80(%esp) movdqa %xmm1, 80(%esp)
movdqa %xmm2, 96(%esp) movdqa %xmm2, %xmm6
movdqa %xmm3, 112(%esp) movdqa %xmm3, %xmm7
xmm_salsa8_core xmm_salsa8_core
paddd 64(%esp), %xmm0 paddd 64(%esp), %xmm0
paddd 80(%esp), %xmm1 paddd 80(%esp), %xmm1
paddd 96(%esp), %xmm2 paddd %xmm2, %xmm6
paddd 112(%esp), %xmm3 paddd %xmm3, %xmm7
movdqa %xmm0, 64(%esp) movdqa %xmm0, 64(%esp)
movdqa %xmm1, 80(%esp) movdqa %xmm1, 80(%esp)
movdqa %xmm2, 96(%esp)
movdqa %xmm3, 112(%esp)
addl $128, %edx addl $128, %edx
cmpl %ecx, %edx cmpl %ecx, %edx
jne xmm_scrypt_core_loop1 jne xmm_scrypt_core_loop1
movdqa 64(%esp), %xmm4
movdqa 80(%esp), %xmm5
movl $1024, %ecx movl $1024, %ecx
xmm_scrypt_core_loop2: xmm_scrypt_core_loop2:
movdqa 0(%esp), %xmm0 movdqa 0(%esp), %xmm0
movdqa 16(%esp), %xmm1 movdqa 16(%esp), %xmm1
movdqa 32(%esp), %xmm2 movdqa 32(%esp), %xmm2
movdqa 48(%esp), %xmm3 movdqa 48(%esp), %xmm3
movdqa 64(%esp), %xmm4
movdqa 80(%esp), %xmm5
movdqa 96(%esp), %xmm6
movdqa 112(%esp), %xmm7
movd %xmm4, %edx movd %xmm4, %edx
andl $1023, %edx andl $1023, %edx
shll $7, %edx shll $7, %edx
@ -789,14 +787,6 @@ xmm_scrypt_core_loop2:
pxor 16(%esi, %edx), %xmm1 pxor 16(%esi, %edx), %xmm1
pxor 32(%esi, %edx), %xmm2 pxor 32(%esi, %edx), %xmm2
pxor 48(%esi, %edx), %xmm3 pxor 48(%esi, %edx), %xmm3
pxor 64(%esi, %edx), %xmm4
pxor 80(%esi, %edx), %xmm5
pxor 96(%esi, %edx), %xmm6
pxor 112(%esi, %edx), %xmm7
movdqa %xmm4, 64(%esp)
movdqa %xmm5, 80(%esp)
movdqa %xmm6, 96(%esp)
movdqa %xmm7, 112(%esp)
pxor %xmm4, %xmm0 pxor %xmm4, %xmm0
pxor %xmm5, %xmm1 pxor %xmm5, %xmm1
@ -816,27 +806,34 @@ xmm_scrypt_core_loop2:
movdqa %xmm2, 32(%esp) movdqa %xmm2, 32(%esp)
movdqa %xmm3, 48(%esp) movdqa %xmm3, 48(%esp)
pxor 64(%esi, %edx), %xmm0
pxor 80(%esi, %edx), %xmm1
pxor 96(%esi, %edx), %xmm2
pxor 112(%esi, %edx), %xmm3
pxor 64(%esp), %xmm0 pxor 64(%esp), %xmm0
pxor 80(%esp), %xmm1 pxor 80(%esp), %xmm1
pxor 96(%esp), %xmm2 pxor %xmm6, %xmm2
pxor 112(%esp), %xmm3 pxor %xmm7, %xmm3
movdqa %xmm0, 64(%esp) movdqa %xmm0, 64(%esp)
movdqa %xmm1, 80(%esp) movdqa %xmm1, 80(%esp)
movdqa %xmm2, 96(%esp) movdqa %xmm2, %xmm6
movdqa %xmm3, 112(%esp) movdqa %xmm3, %xmm7
xmm_salsa8_core xmm_salsa8_core
paddd 64(%esp), %xmm0 paddd 64(%esp), %xmm0
paddd 80(%esp), %xmm1 paddd 80(%esp), %xmm1
paddd 96(%esp), %xmm2 paddd %xmm2, %xmm6
paddd 112(%esp), %xmm3 paddd %xmm3, %xmm7
movdqa %xmm0, %xmm4
movdqa %xmm1, %xmm5
movdqa %xmm0, 64(%esp) movdqa %xmm0, 64(%esp)
movdqa %xmm1, 80(%esp) movdqa %xmm1, 80(%esp)
movdqa %xmm2, 96(%esp)
movdqa %xmm3, 112(%esp)
subl $1, %ecx subl $1, %ecx
ja xmm_scrypt_core_loop2 ja xmm_scrypt_core_loop2
movdqa %xmm6, 96(%esp)
movdqa %xmm7, 112(%esp)
# re-shuffle 1st block back # re-shuffle 1st block back
movl 60(%esp), %edx movl 60(%esp), %edx
movl 44(%esp), %ecx movl 44(%esp), %ecx

5
scrypt.c
View file

@ -296,7 +296,6 @@ PBKDF2_SHA256_80_128_32(uint32_t *tstate, uint32_t *ostate, const uint32_t *pass
{ {
static const uint32_t ihash_finalblk[16] = {0x00000001,0x80000000,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0x00000620}; static const uint32_t ihash_finalblk[16] = {0x00000001,0x80000000,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0x00000620};
uint32_t pad[16]; uint32_t pad[16];
uint32_t i;
SHA256_Transform(tstate, salt, 1); SHA256_Transform(tstate, salt, 1);
SHA256_Transform(tstate, salt+16, 1); SHA256_Transform(tstate, salt+16, 1);
@ -305,9 +304,7 @@ PBKDF2_SHA256_80_128_32(uint32_t *tstate, uint32_t *ostate, const uint32_t *pass
memcpy(pad+8, outerpad, 32); memcpy(pad+8, outerpad, 32);
SHA256_Transform(ostate, pad, 0); SHA256_Transform(ostate, pad, 0);
byteswap_vec(output, ostate, 8);
for (i = 0; i < 8; i++)
output[i] = byteswap(ostate[i]);
} }