915 lines
19 KiB
ArmAsm
915 lines
19 KiB
ArmAsm
# Copyright 2011 pooler@litecoinpool.org
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution.
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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# SUCH DAMAGE.
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#if defined(__i386__)
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.macro gen_salsa8_core_quadround
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movl 52(%esp), %ecx
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movl 4(%esp), %edx
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movl 20(%esp), %ebx
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movl 8(%esp), %esi
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leal (%ecx, %edx), %edi
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roll $7, %edi
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xorl %edi, %ebx
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movl %ebx, 4(%esp)
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movl 36(%esp), %edi
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leal (%edx, %ebx), %ebp
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roll $9, %ebp
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xorl %ebp, %edi
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movl 24(%esp), %ebp
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movl %edi, 8(%esp)
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addl %edi, %ebx
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roll $13, %ebx
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xorl %ebx, %ecx
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movl 40(%esp), %ebx
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movl %ecx, 20(%esp)
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addl %edi, %ecx
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roll $18, %ecx
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leal (%esi, %ebp), %edi
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roll $7, %edi
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xorl %edi, %ebx
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movl %ebx, 24(%esp)
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movl 56(%esp), %edi
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xorl %ecx, %edx
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leal (%ebp, %ebx), %ecx
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roll $9, %ecx
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xorl %ecx, %edi
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movl %edi, 36(%esp)
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movl 28(%esp), %ecx
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movl %edx, 28(%esp)
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movl 44(%esp), %edx
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addl %edi, %ebx
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roll $13, %ebx
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xorl %ebx, %esi
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movl 60(%esp), %ebx
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movl %esi, 40(%esp)
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addl %edi, %esi
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roll $18, %esi
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leal (%ecx, %edx), %edi
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roll $7, %edi
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xorl %edi, %ebx
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movl %ebx, 44(%esp)
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movl 12(%esp), %edi
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xorl %esi, %ebp
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leal (%edx, %ebx), %esi
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roll $9, %esi
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xorl %esi, %edi
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movl %edi, 12(%esp)
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movl 48(%esp), %esi
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movl %ebp, 48(%esp)
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movl 64(%esp), %ebp
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addl %edi, %ebx
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roll $13, %ebx
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xorl %ebx, %ecx
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movl 16(%esp), %ebx
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movl %ecx, 16(%esp)
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addl %edi, %ecx
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roll $18, %ecx
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leal (%esi, %ebp), %edi
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roll $7, %edi
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xorl %edi, %ebx
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movl 32(%esp), %edi
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xorl %ecx, %edx
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leal (%ebp, %ebx), %ecx
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roll $9, %ecx
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xorl %ecx, %edi
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movl %edi, 32(%esp)
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movl %ebx, %ecx
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movl %edx, 52(%esp)
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movl 28(%esp), %edx
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addl %edi, %ebx
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roll $13, %ebx
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xorl %ebx, %esi
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movl 40(%esp), %ebx
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movl %esi, 28(%esp)
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addl %edi, %esi
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roll $18, %esi
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leal (%ecx, %edx), %edi
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roll $7, %edi
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xorl %edi, %ebx
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movl %ebx, 40(%esp)
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movl 12(%esp), %edi
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xorl %esi, %ebp
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leal (%edx, %ebx), %esi
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roll $9, %esi
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xorl %esi, %edi
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movl %edi, 12(%esp)
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movl 4(%esp), %esi
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movl %ebp, 4(%esp)
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movl 48(%esp), %ebp
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addl %edi, %ebx
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roll $13, %ebx
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xorl %ebx, %ecx
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movl 16(%esp), %ebx
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movl %ecx, 16(%esp)
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addl %edi, %ecx
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roll $18, %ecx
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leal (%esi, %ebp), %edi
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roll $7, %edi
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xorl %edi, %ebx
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movl %ebx, 48(%esp)
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movl 32(%esp), %edi
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xorl %ecx, %edx
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leal (%ebp, %ebx), %ecx
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roll $9, %ecx
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xorl %ecx, %edi
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movl %edi, 32(%esp)
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movl 24(%esp), %ecx
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movl %edx, 24(%esp)
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movl 52(%esp), %edx
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addl %edi, %ebx
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roll $13, %ebx
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xorl %ebx, %esi
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movl 28(%esp), %ebx
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movl %esi, 28(%esp)
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addl %edi, %esi
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roll $18, %esi
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leal (%ecx, %edx), %edi
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roll $7, %edi
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xorl %edi, %ebx
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movl %ebx, 52(%esp)
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movl 8(%esp), %edi
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xorl %esi, %ebp
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leal (%edx, %ebx), %esi
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roll $9, %esi
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xorl %esi, %edi
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movl %edi, 8(%esp)
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movl 44(%esp), %esi
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movl %ebp, 44(%esp)
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movl 4(%esp), %ebp
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addl %edi, %ebx
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roll $13, %ebx
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xorl %ebx, %ecx
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movl 20(%esp), %ebx
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movl %ecx, 4(%esp)
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addl %edi, %ecx
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roll $18, %ecx
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leal (%esi, %ebp), %edi
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roll $7, %edi
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xorl %edi, %ebx
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movl 36(%esp), %edi
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xorl %ecx, %edx
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leal (%ebp, %ebx), %ecx
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roll $9, %ecx
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xorl %ecx, %edi
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movl %edi, 20(%esp)
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movl %ebx, %ecx
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movl %edx, 36(%esp)
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movl 24(%esp), %edx
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addl %edi, %ebx
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roll $13, %ebx
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xorl %ebx, %esi
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movl 28(%esp), %ebx
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movl %esi, 24(%esp)
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addl %edi, %esi
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roll $18, %esi
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leal (%ecx, %edx), %edi
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roll $7, %edi
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xorl %edi, %ebx
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movl %ebx, 28(%esp)
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xorl %esi, %ebp
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movl 8(%esp), %esi
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leal (%edx, %ebx), %edi
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roll $9, %edi
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xorl %edi, %esi
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movl 40(%esp), %edi
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movl %ebp, 8(%esp)
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movl 44(%esp), %ebp
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movl %esi, 40(%esp)
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addl %esi, %ebx
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roll $13, %ebx
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xorl %ebx, %ecx
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movl 4(%esp), %ebx
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movl %ecx, 44(%esp)
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addl %esi, %ecx
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roll $18, %ecx
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leal (%edi, %ebp), %esi
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roll $7, %esi
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xorl %esi, %ebx
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movl %ebx, 4(%esp)
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movl 20(%esp), %esi
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xorl %ecx, %edx
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leal (%ebp, %ebx), %ecx
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roll $9, %ecx
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xorl %ecx, %esi
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movl %esi, 56(%esp)
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movl 48(%esp), %ecx
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movl %edx, 20(%esp)
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movl 36(%esp), %edx
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addl %esi, %ebx
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roll $13, %ebx
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xorl %ebx, %edi
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movl 24(%esp), %ebx
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movl %edi, 24(%esp)
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addl %esi, %edi
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roll $18, %edi
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leal (%ecx, %edx), %esi
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roll $7, %esi
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xorl %esi, %ebx
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movl %ebx, 60(%esp)
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movl 12(%esp), %esi
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xorl %edi, %ebp
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leal (%edx, %ebx), %edi
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roll $9, %edi
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xorl %edi, %esi
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movl %esi, 12(%esp)
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movl 52(%esp), %edi
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movl %ebp, 36(%esp)
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movl 8(%esp), %ebp
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addl %esi, %ebx
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roll $13, %ebx
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xorl %ebx, %ecx
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movl 16(%esp), %ebx
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movl %ecx, 16(%esp)
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addl %esi, %ecx
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roll $18, %ecx
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leal (%edi, %ebp), %esi
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roll $7, %esi
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xorl %esi, %ebx
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movl 32(%esp), %esi
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xorl %ecx, %edx
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leal (%ebp, %ebx), %ecx
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roll $9, %ecx
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xorl %ecx, %esi
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movl %esi, 32(%esp)
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movl %ebx, %ecx
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movl %edx, 48(%esp)
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movl 20(%esp), %edx
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addl %esi, %ebx
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roll $13, %ebx
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xorl %ebx, %edi
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movl 24(%esp), %ebx
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movl %edi, 20(%esp)
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addl %esi, %edi
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roll $18, %edi
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leal (%ecx, %edx), %esi
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roll $7, %esi
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xorl %esi, %ebx
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movl %ebx, 8(%esp)
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movl 12(%esp), %esi
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xorl %edi, %ebp
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leal (%edx, %ebx), %edi
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roll $9, %edi
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xorl %edi, %esi
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movl %esi, 12(%esp)
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movl 28(%esp), %edi
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movl %ebp, 52(%esp)
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movl 36(%esp), %ebp
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addl %esi, %ebx
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roll $13, %ebx
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xorl %ebx, %ecx
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movl 16(%esp), %ebx
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movl %ecx, 16(%esp)
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addl %esi, %ecx
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roll $18, %ecx
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leal (%edi, %ebp), %esi
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roll $7, %esi
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xorl %esi, %ebx
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movl %ebx, 28(%esp)
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movl 32(%esp), %esi
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xorl %ecx, %edx
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leal (%ebp, %ebx), %ecx
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roll $9, %ecx
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xorl %ecx, %esi
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movl %esi, 32(%esp)
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movl 4(%esp), %ecx
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movl %edx, 4(%esp)
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movl 48(%esp), %edx
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addl %esi, %ebx
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roll $13, %ebx
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xorl %ebx, %edi
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movl 20(%esp), %ebx
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movl %edi, 20(%esp)
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addl %esi, %edi
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roll $18, %edi
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leal (%ecx, %edx), %esi
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roll $7, %esi
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xorl %esi, %ebx
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movl %ebx, 48(%esp)
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movl 40(%esp), %esi
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xorl %edi, %ebp
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leal (%edx, %ebx), %edi
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roll $9, %edi
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xorl %edi, %esi
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movl %esi, 36(%esp)
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movl 60(%esp), %edi
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movl %ebp, 24(%esp)
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movl 52(%esp), %ebp
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addl %esi, %ebx
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roll $13, %ebx
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xorl %ebx, %ecx
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movl 44(%esp), %ebx
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movl %ecx, 40(%esp)
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addl %esi, %ecx
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roll $18, %ecx
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leal (%edi, %ebp), %esi
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roll $7, %esi
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xorl %esi, %ebx
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movl %ebx, 52(%esp)
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movl 56(%esp), %esi
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xorl %ecx, %edx
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leal (%ebp, %ebx), %ecx
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roll $9, %ecx
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xorl %ecx, %esi
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movl %esi, 56(%esp)
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addl %esi, %ebx
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movl %edx, 44(%esp)
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roll $13, %ebx
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xorl %ebx, %edi
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movl %edi, 60(%esp)
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addl %esi, %edi
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roll $18, %edi
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xorl %edi, %ebp
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movl %ebp, 64(%esp)
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.endm
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.text
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.align 32
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gen_salsa8_core:
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gen_salsa8_core_quadround
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gen_salsa8_core_quadround
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ret
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.text
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.align 32
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.globl scrypt_core
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.globl _scrypt_core
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scrypt_core:
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_scrypt_core:
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pushl %ebx
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pushl %ebp
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pushl %edi
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pushl %esi
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# Check for SSE2 availability
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movl $1, %eax
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cpuid
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andl $0x04000000, %edx
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jnz xmm_scrypt_core
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gen_scrypt_core:
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movl 20(%esp), %edi
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movl 24(%esp), %esi
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subl $72, %esp
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.macro scrypt_core_macro1a p, q
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movl \p(%edi), %eax
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movl \q(%edi), %edx
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movl %eax, \p(%esi)
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movl %edx, \q(%esi)
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xorl %edx, %eax
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movl %eax, \p(%edi)
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movl %eax, \p(%esp)
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.endm
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.macro scrypt_core_macro1b p, q
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movl \p(%edi), %eax
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xorl \p(%esi, %edx), %eax
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movl \q(%edi), %ebx
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xorl \q(%esi, %edx), %ebx
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movl %ebx, \q(%edi)
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xorl %ebx, %eax
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movl %eax, \p(%edi)
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movl %eax, \p(%esp)
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.endm
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.macro scrypt_core_macro2 p, q
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movl \p(%esp), %eax
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addl \p(%edi), %eax
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movl %eax, \p(%edi)
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xorl \q(%edi), %eax
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movl %eax, \q(%edi)
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movl %eax, \p(%esp)
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.endm
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.macro scrypt_core_macro3 p, q
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movl \p(%esp), %eax
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addl \q(%edi), %eax
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movl %eax, \q(%edi)
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.endm
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leal 131072(%esi), %ecx
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gen_scrypt_core_loop1:
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movl %esi, 64(%esp)
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movl %ecx, 68(%esp)
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scrypt_core_macro1a 0, 64
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scrypt_core_macro1a 4, 68
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scrypt_core_macro1a 8, 72
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scrypt_core_macro1a 12, 76
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scrypt_core_macro1a 16, 80
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scrypt_core_macro1a 20, 84
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scrypt_core_macro1a 24, 88
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scrypt_core_macro1a 28, 92
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scrypt_core_macro1a 32, 96
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scrypt_core_macro1a 36, 100
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scrypt_core_macro1a 40, 104
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scrypt_core_macro1a 44, 108
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scrypt_core_macro1a 48, 112
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scrypt_core_macro1a 52, 116
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scrypt_core_macro1a 56, 120
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scrypt_core_macro1a 60, 124
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call gen_salsa8_core
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movl 92(%esp), %edi
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scrypt_core_macro2 0, 64
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scrypt_core_macro2 4, 68
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scrypt_core_macro2 8, 72
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scrypt_core_macro2 12, 76
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scrypt_core_macro2 16, 80
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scrypt_core_macro2 20, 84
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scrypt_core_macro2 24, 88
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scrypt_core_macro2 28, 92
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scrypt_core_macro2 32, 96
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scrypt_core_macro2 36, 100
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scrypt_core_macro2 40, 104
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scrypt_core_macro2 44, 108
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scrypt_core_macro2 48, 112
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scrypt_core_macro2 52, 116
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scrypt_core_macro2 56, 120
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scrypt_core_macro2 60, 124
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call gen_salsa8_core
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movl 92(%esp), %edi
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scrypt_core_macro3 0, 64
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scrypt_core_macro3 4, 68
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scrypt_core_macro3 8, 72
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scrypt_core_macro3 12, 76
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scrypt_core_macro3 16, 80
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scrypt_core_macro3 20, 84
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scrypt_core_macro3 24, 88
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scrypt_core_macro3 28, 92
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scrypt_core_macro3 32, 96
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scrypt_core_macro3 36, 100
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scrypt_core_macro3 40, 104
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scrypt_core_macro3 44, 108
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scrypt_core_macro3 48, 112
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scrypt_core_macro3 52, 116
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scrypt_core_macro3 56, 120
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scrypt_core_macro3 60, 124
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movl 64(%esp), %esi
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movl 68(%esp), %ecx
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addl $128, %esi
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cmpl %ecx, %esi
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jne gen_scrypt_core_loop1
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movl 96(%esp), %esi
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movl $1024, %ecx
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gen_scrypt_core_loop2:
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movl %ecx, 68(%esp)
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movl 64(%edi), %edx
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andl $1023, %edx
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shll $7, %edx
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scrypt_core_macro1b 0, 64
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scrypt_core_macro1b 4, 68
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scrypt_core_macro1b 8, 72
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scrypt_core_macro1b 12, 76
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scrypt_core_macro1b 16, 80
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scrypt_core_macro1b 20, 84
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scrypt_core_macro1b 24, 88
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scrypt_core_macro1b 28, 92
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scrypt_core_macro1b 32, 96
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|
scrypt_core_macro1b 36, 100
|
|
scrypt_core_macro1b 40, 104
|
|
scrypt_core_macro1b 44, 108
|
|
scrypt_core_macro1b 48, 112
|
|
scrypt_core_macro1b 52, 116
|
|
scrypt_core_macro1b 56, 120
|
|
scrypt_core_macro1b 60, 124
|
|
|
|
call gen_salsa8_core
|
|
|
|
movl 92(%esp), %edi
|
|
scrypt_core_macro2 0, 64
|
|
scrypt_core_macro2 4, 68
|
|
scrypt_core_macro2 8, 72
|
|
scrypt_core_macro2 12, 76
|
|
scrypt_core_macro2 16, 80
|
|
scrypt_core_macro2 20, 84
|
|
scrypt_core_macro2 24, 88
|
|
scrypt_core_macro2 28, 92
|
|
scrypt_core_macro2 32, 96
|
|
scrypt_core_macro2 36, 100
|
|
scrypt_core_macro2 40, 104
|
|
scrypt_core_macro2 44, 108
|
|
scrypt_core_macro2 48, 112
|
|
scrypt_core_macro2 52, 116
|
|
scrypt_core_macro2 56, 120
|
|
scrypt_core_macro2 60, 124
|
|
|
|
call gen_salsa8_core
|
|
|
|
movl 92(%esp), %edi
|
|
movl 96(%esp), %esi
|
|
scrypt_core_macro3 0, 64
|
|
scrypt_core_macro3 4, 68
|
|
scrypt_core_macro3 8, 72
|
|
scrypt_core_macro3 12, 76
|
|
scrypt_core_macro3 16, 80
|
|
scrypt_core_macro3 20, 84
|
|
scrypt_core_macro3 24, 88
|
|
scrypt_core_macro3 28, 92
|
|
scrypt_core_macro3 32, 96
|
|
scrypt_core_macro3 36, 100
|
|
scrypt_core_macro3 40, 104
|
|
scrypt_core_macro3 44, 108
|
|
scrypt_core_macro3 48, 112
|
|
scrypt_core_macro3 52, 116
|
|
scrypt_core_macro3 56, 120
|
|
scrypt_core_macro3 60, 124
|
|
|
|
movl 68(%esp), %ecx
|
|
subl $1, %ecx
|
|
ja gen_scrypt_core_loop2
|
|
|
|
addl $72, %esp
|
|
popl %esi
|
|
popl %edi
|
|
popl %ebp
|
|
popl %ebx
|
|
ret
|
|
|
|
|
|
.macro xmm_salsa8_core_doubleround
|
|
movdqa %xmm1, %xmm4
|
|
paddd %xmm0, %xmm4
|
|
movdqa %xmm4, %xmm5
|
|
pslld $7, %xmm4
|
|
psrld $25, %xmm5
|
|
pxor %xmm4, %xmm3
|
|
pxor %xmm5, %xmm3
|
|
movdqa %xmm0, %xmm4
|
|
|
|
paddd %xmm3, %xmm4
|
|
movdqa %xmm4, %xmm5
|
|
pslld $9, %xmm4
|
|
psrld $23, %xmm5
|
|
pxor %xmm4, %xmm2
|
|
movdqa %xmm3, %xmm4
|
|
pshufd $0x93, %xmm3, %xmm3
|
|
pxor %xmm5, %xmm2
|
|
|
|
paddd %xmm2, %xmm4
|
|
movdqa %xmm4, %xmm5
|
|
pslld $13, %xmm4
|
|
psrld $19, %xmm5
|
|
pxor %xmm4, %xmm1
|
|
movdqa %xmm2, %xmm4
|
|
pshufd $0x4e, %xmm2, %xmm2
|
|
pxor %xmm5, %xmm1
|
|
|
|
paddd %xmm1, %xmm4
|
|
movdqa %xmm4, %xmm5
|
|
pslld $18, %xmm4
|
|
psrld $14, %xmm5
|
|
pxor %xmm4, %xmm0
|
|
pshufd $0x39, %xmm1, %xmm1
|
|
pxor %xmm5, %xmm0
|
|
movdqa %xmm3, %xmm4
|
|
|
|
paddd %xmm0, %xmm4
|
|
movdqa %xmm4, %xmm5
|
|
pslld $7, %xmm4
|
|
psrld $25, %xmm5
|
|
pxor %xmm4, %xmm1
|
|
pxor %xmm5, %xmm1
|
|
movdqa %xmm0, %xmm4
|
|
|
|
paddd %xmm1, %xmm4
|
|
movdqa %xmm4, %xmm5
|
|
pslld $9, %xmm4
|
|
psrld $23, %xmm5
|
|
pxor %xmm4, %xmm2
|
|
movdqa %xmm1, %xmm4
|
|
pshufd $0x93, %xmm1, %xmm1
|
|
pxor %xmm5, %xmm2
|
|
|
|
paddd %xmm2, %xmm4
|
|
movdqa %xmm4, %xmm5
|
|
pslld $13, %xmm4
|
|
psrld $19, %xmm5
|
|
pxor %xmm4, %xmm3
|
|
movdqa %xmm2, %xmm4
|
|
pshufd $0x4e, %xmm2, %xmm2
|
|
pxor %xmm5, %xmm3
|
|
|
|
paddd %xmm3, %xmm4
|
|
movdqa %xmm4, %xmm5
|
|
pslld $18, %xmm4
|
|
psrld $14, %xmm5
|
|
pxor %xmm4, %xmm0
|
|
pshufd $0x39, %xmm3, %xmm3
|
|
pxor %xmm5, %xmm0
|
|
.endm
|
|
|
|
.macro xmm_salsa8_core
|
|
xmm_salsa8_core_doubleround
|
|
xmm_salsa8_core_doubleround
|
|
xmm_salsa8_core_doubleround
|
|
xmm_salsa8_core_doubleround
|
|
.endm
|
|
|
|
.align 32
|
|
xmm_scrypt_core:
|
|
movl 20(%esp), %edi
|
|
movl 24(%esp), %esi
|
|
movl %esp, %ebp
|
|
subl $128, %esp
|
|
andl $-16, %esp
|
|
|
|
# shuffle 1st block to (%esp)
|
|
movl 60(%edi), %edx
|
|
movl 44(%edi), %ecx
|
|
movl 28(%edi), %ebx
|
|
movl 12(%edi), %eax
|
|
movl %edx, 12(%esp)
|
|
movl %ecx, 28(%esp)
|
|
movl %ebx, 44(%esp)
|
|
movl %eax, 60(%esp)
|
|
movl 40(%edi), %ecx
|
|
movl 24(%edi), %ebx
|
|
movl 8(%edi), %eax
|
|
movl 56(%edi), %edx
|
|
movl %ecx, 8(%esp)
|
|
movl %ebx, 24(%esp)
|
|
movl %eax, 40(%esp)
|
|
movl %edx, 56(%esp)
|
|
movl 20(%edi), %ebx
|
|
movl 4(%edi), %eax
|
|
movl 52(%edi), %edx
|
|
movl 36(%edi), %ecx
|
|
movl %ebx, 4(%esp)
|
|
movl %eax, 20(%esp)
|
|
movl %edx, 36(%esp)
|
|
movl %ecx, 52(%esp)
|
|
movl 0(%edi), %eax
|
|
movl 48(%edi), %edx
|
|
movl 32(%edi), %ecx
|
|
movl 16(%edi), %ebx
|
|
movl %eax, 0(%esp)
|
|
movl %edx, 16(%esp)
|
|
movl %ecx, 32(%esp)
|
|
movl %ebx, 48(%esp)
|
|
|
|
# shuffle 2nd block to 64(%esp)
|
|
movl 124(%edi), %edx
|
|
movl 108(%edi), %ecx
|
|
movl 92(%edi), %ebx
|
|
movl 76(%edi), %eax
|
|
movl %edx, 76(%esp)
|
|
movl %ecx, 92(%esp)
|
|
movl %ebx, 108(%esp)
|
|
movl %eax, 124(%esp)
|
|
movl 104(%edi), %ecx
|
|
movl 88(%edi), %ebx
|
|
movl 72(%edi), %eax
|
|
movl 120(%edi), %edx
|
|
movl %ecx, 72(%esp)
|
|
movl %ebx, 88(%esp)
|
|
movl %eax, 104(%esp)
|
|
movl %edx, 120(%esp)
|
|
movl 84(%edi), %ebx
|
|
movl 68(%edi), %eax
|
|
movl 116(%edi), %edx
|
|
movl 100(%edi), %ecx
|
|
movl %ebx, 68(%esp)
|
|
movl %eax, 84(%esp)
|
|
movl %edx, 100(%esp)
|
|
movl %ecx, 116(%esp)
|
|
movl 64(%edi), %eax
|
|
movl 112(%edi), %edx
|
|
movl 96(%edi), %ecx
|
|
movl 80(%edi), %ebx
|
|
movl %eax, 64(%esp)
|
|
movl %edx, 80(%esp)
|
|
movl %ecx, 96(%esp)
|
|
movl %ebx, 112(%esp)
|
|
|
|
movl %esi, %edx
|
|
leal 131072(%esi), %ecx
|
|
xmm_scrypt_core_loop1:
|
|
movdqa 0(%esp), %xmm0
|
|
movdqa 16(%esp), %xmm1
|
|
movdqa 32(%esp), %xmm2
|
|
movdqa 48(%esp), %xmm3
|
|
movdqa 64(%esp), %xmm4
|
|
movdqa 80(%esp), %xmm5
|
|
movdqa 96(%esp), %xmm6
|
|
movdqa 112(%esp), %xmm7
|
|
movdqa %xmm0, 0(%edx)
|
|
movdqa %xmm1, 16(%edx)
|
|
movdqa %xmm2, 32(%edx)
|
|
movdqa %xmm3, 48(%edx)
|
|
movdqa %xmm4, 64(%edx)
|
|
movdqa %xmm5, 80(%edx)
|
|
movdqa %xmm6, 96(%edx)
|
|
movdqa %xmm7, 112(%edx)
|
|
|
|
pxor %xmm4, %xmm0
|
|
pxor %xmm5, %xmm1
|
|
pxor %xmm6, %xmm2
|
|
pxor %xmm7, %xmm3
|
|
movdqa %xmm0, 0(%esp)
|
|
movdqa %xmm1, 16(%esp)
|
|
movdqa %xmm2, 32(%esp)
|
|
movdqa %xmm3, 48(%esp)
|
|
xmm_salsa8_core
|
|
paddd 0(%esp), %xmm0
|
|
paddd 16(%esp), %xmm1
|
|
paddd 32(%esp), %xmm2
|
|
paddd 48(%esp), %xmm3
|
|
movdqa %xmm0, 0(%esp)
|
|
movdqa %xmm1, 16(%esp)
|
|
movdqa %xmm2, 32(%esp)
|
|
movdqa %xmm3, 48(%esp)
|
|
|
|
pxor 64(%esp), %xmm0
|
|
pxor 80(%esp), %xmm1
|
|
pxor 96(%esp), %xmm2
|
|
pxor 112(%esp), %xmm3
|
|
movdqa %xmm0, 64(%esp)
|
|
movdqa %xmm1, 80(%esp)
|
|
movdqa %xmm2, 96(%esp)
|
|
movdqa %xmm3, 112(%esp)
|
|
xmm_salsa8_core
|
|
paddd 64(%esp), %xmm0
|
|
paddd 80(%esp), %xmm1
|
|
paddd 96(%esp), %xmm2
|
|
paddd 112(%esp), %xmm3
|
|
movdqa %xmm0, 64(%esp)
|
|
movdqa %xmm1, 80(%esp)
|
|
movdqa %xmm2, 96(%esp)
|
|
movdqa %xmm3, 112(%esp)
|
|
|
|
addl $128, %edx
|
|
cmpl %ecx, %edx
|
|
jne xmm_scrypt_core_loop1
|
|
|
|
movl $1024, %ecx
|
|
xmm_scrypt_core_loop2:
|
|
movdqa 0(%esp), %xmm0
|
|
movdqa 16(%esp), %xmm1
|
|
movdqa 32(%esp), %xmm2
|
|
movdqa 48(%esp), %xmm3
|
|
movdqa 64(%esp), %xmm4
|
|
movdqa 80(%esp), %xmm5
|
|
movdqa 96(%esp), %xmm6
|
|
movdqa 112(%esp), %xmm7
|
|
movd %xmm4, %edx
|
|
andl $1023, %edx
|
|
shll $7, %edx
|
|
pxor 0(%esi, %edx), %xmm0
|
|
pxor 16(%esi, %edx), %xmm1
|
|
pxor 32(%esi, %edx), %xmm2
|
|
pxor 48(%esi, %edx), %xmm3
|
|
pxor 64(%esi, %edx), %xmm4
|
|
pxor 80(%esi, %edx), %xmm5
|
|
pxor 96(%esi, %edx), %xmm6
|
|
pxor 112(%esi, %edx), %xmm7
|
|
movdqa %xmm4, 64(%esp)
|
|
movdqa %xmm5, 80(%esp)
|
|
movdqa %xmm6, 96(%esp)
|
|
movdqa %xmm7, 112(%esp)
|
|
|
|
pxor %xmm4, %xmm0
|
|
pxor %xmm5, %xmm1
|
|
pxor %xmm6, %xmm2
|
|
pxor %xmm7, %xmm3
|
|
movdqa %xmm0, 0(%esp)
|
|
movdqa %xmm1, 16(%esp)
|
|
movdqa %xmm2, 32(%esp)
|
|
movdqa %xmm3, 48(%esp)
|
|
xmm_salsa8_core
|
|
paddd 0(%esp), %xmm0
|
|
paddd 16(%esp), %xmm1
|
|
paddd 32(%esp), %xmm2
|
|
paddd 48(%esp), %xmm3
|
|
movdqa %xmm0, 0(%esp)
|
|
movdqa %xmm1, 16(%esp)
|
|
movdqa %xmm2, 32(%esp)
|
|
movdqa %xmm3, 48(%esp)
|
|
|
|
pxor 64(%esp), %xmm0
|
|
pxor 80(%esp), %xmm1
|
|
pxor 96(%esp), %xmm2
|
|
pxor 112(%esp), %xmm3
|
|
movdqa %xmm0, 64(%esp)
|
|
movdqa %xmm1, 80(%esp)
|
|
movdqa %xmm2, 96(%esp)
|
|
movdqa %xmm3, 112(%esp)
|
|
xmm_salsa8_core
|
|
paddd 64(%esp), %xmm0
|
|
paddd 80(%esp), %xmm1
|
|
paddd 96(%esp), %xmm2
|
|
paddd 112(%esp), %xmm3
|
|
movdqa %xmm0, 64(%esp)
|
|
movdqa %xmm1, 80(%esp)
|
|
movdqa %xmm2, 96(%esp)
|
|
movdqa %xmm3, 112(%esp)
|
|
|
|
subl $1, %ecx
|
|
ja xmm_scrypt_core_loop2
|
|
|
|
# re-shuffle 1st block back
|
|
movl 60(%esp), %edx
|
|
movl 44(%esp), %ecx
|
|
movl 28(%esp), %ebx
|
|
movl 12(%esp), %eax
|
|
movl %edx, 12(%edi)
|
|
movl %ecx, 28(%edi)
|
|
movl %ebx, 44(%edi)
|
|
movl %eax, 60(%edi)
|
|
movl 40(%esp), %ecx
|
|
movl 24(%esp), %ebx
|
|
movl 8(%esp), %eax
|
|
movl 56(%esp), %edx
|
|
movl %ecx, 8(%edi)
|
|
movl %ebx, 24(%edi)
|
|
movl %eax, 40(%edi)
|
|
movl %edx, 56(%edi)
|
|
movl 20(%esp), %ebx
|
|
movl 4(%esp), %eax
|
|
movl 52(%esp), %edx
|
|
movl 36(%esp), %ecx
|
|
movl %ebx, 4(%edi)
|
|
movl %eax, 20(%edi)
|
|
movl %edx, 36(%edi)
|
|
movl %ecx, 52(%edi)
|
|
movl 0(%esp), %eax
|
|
movl 48(%esp), %edx
|
|
movl 32(%esp), %ecx
|
|
movl 16(%esp), %ebx
|
|
movl %eax, 0(%edi)
|
|
movl %edx, 16(%edi)
|
|
movl %ecx, 32(%edi)
|
|
movl %ebx, 48(%edi)
|
|
|
|
# re-shuffle 2nd block back
|
|
movl 124(%esp), %edx
|
|
movl 108(%esp), %ecx
|
|
movl 92(%esp), %ebx
|
|
movl 76(%esp), %eax
|
|
movl %edx, 76(%edi)
|
|
movl %ecx, 92(%edi)
|
|
movl %ebx, 108(%edi)
|
|
movl %eax, 124(%edi)
|
|
movl 104(%esp), %ecx
|
|
movl 88(%esp), %ebx
|
|
movl 72(%esp), %eax
|
|
movl 120(%esp), %edx
|
|
movl %ecx, 72(%edi)
|
|
movl %ebx, 88(%edi)
|
|
movl %eax, 104(%edi)
|
|
movl %edx, 120(%edi)
|
|
movl 84(%esp), %ebx
|
|
movl 68(%esp), %eax
|
|
movl 116(%esp), %edx
|
|
movl 100(%esp), %ecx
|
|
movl %ebx, 68(%edi)
|
|
movl %eax, 84(%edi)
|
|
movl %edx, 100(%edi)
|
|
movl %ecx, 116(%edi)
|
|
movl 64(%esp), %eax
|
|
movl 112(%esp), %edx
|
|
movl 96(%esp), %ecx
|
|
movl 80(%esp), %ebx
|
|
movl %eax, 64(%edi)
|
|
movl %edx, 80(%edi)
|
|
movl %ecx, 96(%edi)
|
|
movl %ebx, 112(%edi)
|
|
|
|
movl %ebp, %esp
|
|
popl %esi
|
|
popl %edi
|
|
popl %ebp
|
|
popl %ebx
|
|
ret
|
|
|
|
#endif
|